1. Field of the Invention
This invention relates to a method used in fabricating semiconductor integrated circuits, and more specifically to a method for removing silicide stringers that can form during the fabrication of MOS transistor structures.
2.Related Art
Self-ALigned metal silICIDE contact structures, commonly referred to as salicide structures, are often used in the formation of Metal Oxide Semiconductor (MOS) transistor structures to minimize contact resistance. Thus, allowing for reduction of the size of contact structures. While the formation of these salicide structures require several process steps, advantageously, none is a masking step; hence, processes for the formation of salicide structures are widely used.
In one known salicide process for a MOS transistor, source and drain (S/D) regions are formed aligned to a gate electrode structure and/or any sidewall spacers that may be used. A blanket metal layer is deposited so that silicon, at the upper surface of source, drain and gate regions, is in contact with the metal. The wafer is then heated to a temperature sufficiently high for the metal and silicon, in contact with one another, to undergo a reaction and form a metal silicide. The unreacted metal is then removed, and regions of metal silicide are revealed. Thus, by employing a salicide process, regions of metal silicide are formed aligned, without benefit of a masking step, in this example to S/D and gate regions. During the salicide process, the sidewall spacers serve to prevent bridging of the gate silicide region with either the source or drain silicide regions. After removal of the metal not reacted to form a silicide, a second, higher temperature silicide anneal step is often employed to stabilize the silicide regions formed and to provide the lowest possible silicide resistivity.
However, as device geometries become smaller, the width of sidewall spacers becomes smaller. As a result, bridging of-adjacent silicide regions across these smaller spacers, due to remnants of the metals layer or stringers, becomes an increasingly serious problem. This stringer formation and the resultant bridging can occur due to a variety of reasons that are enhanced by the smaller spacers. For example, a limited reaction of the spacer material with the metal, or migration of silicon on the surface of the spacer can result in silicide stringers which are resistant to the selective metal etch. Alternatively the stringer formation can be due to any one of a variety of physical reasons, such as non-uniformities in the initial metal film deposition or the metal etch process. While some process alterations or optimization can help alleviate the stringer problem, often stringer formation cannot be eliminated through such means, and yield loss due to electrical shorts caused by such stringers result.
Thus it would be advantageous to have a method of forming a semiconductor integrated circuit having silicide enhanced contact regions that would provide for the removal of any silicide stringers that might form. In addition, it would be advantageous for such a silicide stringer removal process to be compatible with MOS transistor processing and not require any additional masking steps. Finally, it would be advantageous for the silicide stringer removal process to allow a choice of transistor isolation processes, for example a local oxidation of silicon (LOCOS) process or a trench isolation process.